Global J. of Engng. Educ., Vol.I,
No.2 Printed in Australia |
Copyright 1997 UICEE
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for the Design of Integrated Circuits* | |||
Ulrich Heinkel Martin Padeffke Oliver Kraus Jürgen Frickel
University of Erlangen-Nuremberg Cauerstrasse 6, 91058 Erlangen, Germany |
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TABLE OF CONTENTS
Part of the study of a number of students at the Institute of Computer-Aided Circuit Design in the University of Erlangen-Nuremberg requires them to be introduced to the capabilities and possibilities of VHDL, simulation and synthesis tools [1][2]. It was decided to develop a VHDL tutorial for beginners using the network possibilities of HTML and HTTP within the learning system VHDL-Online [3][4]. In a course lasting 4 months students have to design a complex Application Specific Integrated Circuit (ASIC), which firstly requires them to finish the VHDL tutorial and read the modelling guidelines.
It was recognised, during the development of VHDL-Online, that what was being implemented was not an online tutorial but a Virtual Classroom: using the network capabilities of the world-wide-web, it is possible to teach students at any computer terminal in the world [5][6] (Figure 1). Just like a real class, the virtual class consists of a teacher and students and several methods of communication; the main difference between the two forms of class is the distance between the teacher and the students. The term virtual only describes the use of computer-animated or computer-based methods of communication, methods which must accentuate the individuality of the users. It was decided to implement such methods in VHDL-Online.
The following sections of this paper describe components of VHDL-Online which are already implemented, features of a Virtual Classroom, and future work in this area. The final section contains practical experiences and other topics.
Figure 1: VHDL-Online homepage.
It is necessary to provide a quick reference manual and standard solutions, for practical work with VHDL, as the results and benefits of most hardware description languages for the synthesis of integrated circuits depend upon the style of description. The hypertext based VHDL reference offers students network-wide access to a database tailored to their requirements. The complete VHDL-online system is only accessible to students in our courses through user and password authorisation, managed by the HTTP daemon. The system is structured in five main modules described in Figure 2.
Figure 2: The components of VHDL-Online.
This section describes the concept of VHDL for modelling and synthesis: short examples explain the difference between a normal sequential programming language and the concurrent VHDL methodology; the main language elements are explained; and the difference in the use of VHDL for simulation and for synthesis is pointed out. The following are clarified: how readable and synthesisable code should be structured; what language constructions should be avoided; and how packages should be managed. The use of VHDL, both to generate sequential and combinational circuits and to avoid the generation of latches, is described.
A CGI programme called ITS, which interactively generates the HTML pages, has been implemented. All the pages are stored in a database called ITDB. A language extension to HTML allows us to insert multiple-choice-questions and answers in one HTML page. Students have to answer some questions after each topic (Figure 3); correct answers are generated by ITS, and the students’ choices are stored in a databank (Figure 4). The teacher is able to access the databank with a special interface which displays the student data, eg the duration of the session and answers to the questions. This is a good method to decide if a student needs any help or some hints. This tutorial contains enough information to commence with the interactive tutorial. The topics mentioned are worked on in the VHDL workshop.
A complete language reference (in German) has been implemented based on hypertext links. On the top level HTML page all main language elements of VHDL are listed in a table (Figure 5). Other pages give examples of a chosen topic (Figure 6). For more special keywords, the user can use a searchable index. The matching links contain additional information and examples of standard solutions. The reference consists of about 110 HTML pages containing the Backus-Naur Format (BNF), examples, explanations and links to related topics.
Before commencing the lessons, the user has to send us the Internet address of his/her workstation, PC or Macintosh. A special CGI script generates a database, containing the IP number of the user’s machine, for each user of the tutorial. Another CGI script is started and the tool display is sent automatically to the IP number stored in that database when the user starts a VHDL tool by following a special hyperlink. An X-server is necessary to interpret the display information if the user has no Unix system.
The tutorial is based upon common synthesis and simulation tools (in this case, Synopsys), with the use of the tools explained in a short, very simple example. The tutorial does not use the complete features of the tools. Also, the user only needs to know the compilation order of the VHDL models, how to start a waveform display and how to change the design hierarchy in the simulator.
The complete tutorial consists of 11 lessons. Starting with a simple decoder or counter description, the students have to design a digital camera controller. After the specification section of the exercise, the user has to start an editor, run the VHDL compiler, simulator or synthesis tool. Each lab exercise contains the VHDL system commands at the bottom of the Web page (Figure 7); there are specific hyperlinks to the text editor or the compiler etc; and the VHDL compiler output is displayed in the browser window. The simulation and synthesis tools are stand-alone applications and must be started only at the beginning of the session. (See Figures 8 and 9 for an example of the tutorial.)
Figure 7: Synopsys VSS on a Macintosh.
Figure 8: The complete design of the digital camera.
Figure 9: Lesson 8 - exposure timer and counter of pictures.
It is proposed to use electronic mail for VHDL and tool support as this method offers an easy possibility of publishing the questions and answers in a FAQ (frequently asked questions) list where many problems are discussed.
There is a template with the minimal VHDL structure for every VHDL model; students are able to reload the original template version of the actual lesson with a pull-down menu (Figure 10) and can switch to a complete list of all VHDL models of the tutorial. All hyperlinks of the labs are listed on an extra HTML page, and the same list exists for a solution directory (Figure 11).
The links point to the file location in the solutions directory. Also, the user is able to make the complete design (compilation, simulation and synthesis) with the solutions of the exercises.
A VHDL model library, containing parametrisable and synthesisable RT-level models, has been implemented with the objective of providing a clear specification of model behaviour using pictures and text for the functional description (Figure 12). The existing models are parametrisable versions of standard solutions, eg counters (up/down), arbiters, etc (Figure 13).
Figure 12: VHDL-Model-Library.
Figure 13: ARBITER specification.
The user can choose the parameters for the bit-width of the counter or the number of arbiter states. Another possibility is the generation of the testbench for the chosen model; the testbench is parametrised in the same way as the corresponding RT-level model.
The last validation of the RT model must be done by the user with the generated testbench and the same model parameters. Alternatively, the user can generate a Synopsys specific trace file for the visualisation of the signals in the waveform window. All choices are made in the description page of the model and are sent to a special CGI script. This script generates the VHDL models using a template mechanism and sends them back to the WWW browser. The combination of the VHDL Reference and the Model-Library is a good teaching-extension which can be easily extended with new models.
A search engine has been implemented which is able to search for a special keyword in the complete file system of VHDL-Online or only in the HTML comments, which are not displayed in the HTML browser (Figure 14). These comments are additional subjects, eg describing VHDL syntax with normal words, or presenting another meaning of a given syntax.
The matching HTML parts of the parsed files are displayed in the browser: the search engine sends back the original HTML part of the file containing the keyword and the browser interprets this stripped part of the file. The user sees a real web-page and can decide whether the displayed file is the one with the most useful content for the given keyword.
Figure 15: The COMO IRC applet.
This is a JAVA application which is based on Internet Relay Chat (IRC), allowing several users to communicate with each other in a common text window. This talk session is not moderated. The JAVA programme is based on the COMO-applet, the team-winning implementation of the JAVA-cup (Figure 15).
The active users are indicated in a special window, and, if necessary, the teacher can join the actual session. An IRC daemon at the University of Erlangen-Nuremberg manages the chat sessions. The complete chat-process will be stored in a logfile and will be displayed in a special HTML page in future.
The term application-sharing means the common use of a single application by a team of users. One superuser, eg the teacher, starts the application and the display is automatically sent to the other users, eg the students. In an application-sharing workbench, the users can stop (freeze) the application, they can use coloured pens for drawing, can place text areas in the same colour on the screen, and can draw and write on a virtual foil layed on the frozen application. There are several commercial and academic implementations of application sharing, eg JointX and VirtualX, but these realisations are based on the normal UNIX X11 window system [7]. Future work will primarily involve the platform independent implementation of an application sharing workbench using JAVA.
The system has been used in two cases of practical work, with students achieving a higher information standard. They are also able to arrange their schedule more flexibly as they can simply use the nearest computer terminal in the university network.
The performance of the University of Erlangen-Nuremberg’s LAN is quite good. The performance in a WAN via 300 km Internet has been tested. In this case, the data rate depends on the activity on the Internet and the band width of the given connection. It appears that slightly changing display information is a good method for better performance, eg opening the waveform display after the simulation, iconifying as much as possible etc. System security using passwords and user identifiers is a good method for controlling system access; there is the possibility of registering each transaction of every user. If users have problems in writing and understanding VHDL, it is possible to control their files in their tutorial directory and to send tips and hints by way of electronic mail. The system implementation using HTML and HTTP standards offers an easy possibility for network wide data management. The usage in a LAN is quite good and an assistance for design teams.
It is possible to integrate the text editor features into the WWW-browser for better performance. This needs a CGI script which manages the data transfer of the edited VHDL sources to the user, thus the editing of the VHDL files works on the local user platform and not via Internet.
The next step in the direction of a virtual classroom will be the development of JAVA applets.
1. Frickel, J., Heinkel, U., Kuntzsch, C. and Selz, M., Design of a transmission failure indicator chip in a student course using VHDL. Proc. 5th Eurochip Workshop on VLSI Training, Dresden Germany (1994).
2. Frickel, J. and Heinkel, U., TRAFFIC - Designing chips for digital transmission tests in a student project. Proc. Education of Computer Aided Design of Modern VLSI Circuits, MixVLSI, Krakau, Poland (1995).
3. Heinkel, U., Padeffke, M., and Neuffer, H., World-Wide-Web tutorial. Proc. VHDL-Forum for CAD in Europe, Dresden, Germany (1996).
4. McCool R., The Common Gateway Interface, NCSA, http://hoohoo.ncsa.uiuc.edu/cgi/ (1994).
5. Frickel, J., Heinkel, U., Padeffke, M. and Glauert, W.H., A hypertext based interactive teaching system for designing integrated circuits with VHDL. Proc. 3rd East-West Congress on Engineering Education, Gdynia, Poland (1996).
6. Heinkel, U., Padeffke, M. and Glauert, W. H., VHDL-Online - A hypertext based interactive teaching system. Proc. VHDL-Forum for CAD in Europe, Dresden, Germany (1996).
7. Encarnação, J.L., Hornung, Ch. and Osterfeld, U., Telekommunikationsanwendungen für kleine und mittlere Unternehmen, COBRA-3 Workshop, Darmstadt, Germany (1996).
8. COMO professional, http://www.comopro.com
9. Koch, M. and Tavangarian, D., Hypermedia VHDL - Ein multimediaunterstütztes VHDL-Lernsystem, GI/ITG Workshop Hardwarebeschreibungs-sprachen und Modellierungs-paradigmen, Frankfurt, Germany (1995).
10. IEEE, Standard 1076VHDL Language Reference Manual, 1987, 1993
Ulrich
Heinkel
Martin
Padeffke
Oliver
Kraus
Jürgen
Frickel